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| Kvetch-A-Sketch, Overview |
Dangerous Prototypes TTL Logic Contest
“Electronic “Kvetch-A-Sketch with 32-Page Flip Pad”
Submitted by Eastern Star Geek, Johnson City, Tennessee USA
UPDATE:
Yay! This placed in the 2nd Place Category! Thanks to all the judges, participants and readers who made this all possible. There were many interesting, creative and just plain fun entries submitted by people all over the world, making this a most exciting event!
Especially deserving of extra-special thanks, of course, is my DW, who endured the long hours of my absence and general obliviousness to everything else while I was building this!
Some more stuff on this project appears in my next Blog entry:
http://easternstargeek.blogspot.com/2011/10/7400-logic-electronic-etch-sketch.html.
This project is an electronic realization of the famous Ohio Arts “Etch-A-Sketch” toy, with a twist. Like the original, two rotary knobs are used to move a cursor horizontally and vertically, respectively, but unlike the original, a third knob selects one of 32 different sketch pages. Simple flip-pad animations can therefore be created by twirling the page knob rapidly.
The screen is built from four 8x8 dual-color LED matrix displays, for a total screen area of 16x16 pixels. The artist has a palette of three colors from which to choose- Red, Green and Yellow.
The three rotary knobs are quadrature encoders with a built-in pushbutton.
Several toggle switches and pushbuttons give the artist the ability to:
1. Draw dots, either continuously, or one at a time, using the built-in pushbutton in the X knob.
2. Erase dots, either continuously, or one at a time, using the built-in pushbutton in the Y knob.
3. Choose the color of the dot(s) to be drawn or erased
4. Choose between Edit and Playback modes (Cursor is turned off in Playback)
5. Clear the current page
6. Go to the “Home Page” using the built-in pushbutton in the Page knob.
Theory of Operation:
1. Memory Organization:
The system uses an 8-bit data bus, and each line requires 4 bytes of data to be displayed:
Byte 0: Red Dots, 0-7
Byte 1: Red Dots, 8-15
Byte 2: Green Dots, 0-7
Byte 3: Green Dots, 8-15
The data in each byte represent the four “segments” within a line.
Screen data is stored in a 2Kx8 non-volatile RAM (Dallas DS1220 type), which is addressed as follows:
A0: Red/Green
A1: Low Segment/High Segment
A2-A5 Line Address (0-15)
A6-A10 Page Address (0 -31)
The memory was chosen for it’s non-volatility achieved with an on-board Lithium cell, which allows an infinite number of write cycles.
The system uses an 8-bit data bus, and each line requires 4 bytes of data to be displayed:
Byte 0: Red Dots, 0-7
Byte 1: Red Dots, 8-15
Byte 2: Green Dots, 0-7
Byte 3: Green Dots, 8-15
The data in each byte represent the four “segments” within a line.
Screen data is stored in a 2Kx8 non-volatile RAM (Dallas DS1220 type), which is addressed as follows:
A0: Red/Green
A1: Low Segment/High Segment
A2-A5 Line Address (0-15)
A6-A10 Page Address (0 -31)
The memory was chosen for it’s non-volatility achieved with an on-board Lithium cell, which allows an infinite number of write cycles.
2. LED Screen Data Management and Addressing:
The LED screen is made from four Betlux BL-M12A883DUG-11 Dual-Color 8x8 Matrix Displays. These are Row-Cathode, Column Anode types with one red and green LED per pixel. They are connected as a row/column matrix for a total of 256 pixels. Each line segment is driven by ‘HC574 8-bit latch, which drive the columns directly. The latch signals to each segment come from ½ of a 1-of-8 selector which decodes A0 and A1. The selector is gated by the Timing Generator, as well. Each group of 8 Rows are driven with a ULN2803 octal darlington arrays, which are in turn driven by a ‘HC238 1-of-8 selector which decodes A2-A5 of the address bus.
The LED screen is made from four Betlux BL-M12A883DUG-11 Dual-Color 8x8 Matrix Displays. These are Row-Cathode, Column Anode types with one red and green LED per pixel. They are connected as a row/column matrix for a total of 256 pixels. Each line segment is driven by ‘HC574 8-bit latch, which drive the columns directly. The latch signals to each segment come from ½ of a 1-of-8 selector which decodes A0 and A1. The selector is gated by the Timing Generator, as well. Each group of 8 Rows are driven with a ULN2803 octal darlington arrays, which are in turn driven by a ‘HC238 1-of-8 selector which decodes A2-A5 of the address bus.
3. Rotary Encoder Signal Processing and Decoding:
Each rotary encoder consists of two switch contacts with a common wiper for quadrature channels A and B, as well as a third contact that closes momentarily when the knob is pressed. When the knob is rotated, pulses are generated on the A and B channels at an equivalent frequency proportional to the speed of rotation, but displaced in phase by 90 electrical degrees. The direction of rotation can be determined by which channel leads the other.
First, the quadrature channels of each encoder are de-bounced with a Motorola MC14490 6-channel debouncer chip. Then, for each encoder, one section of a 74HC74 D-Flip-flop decodes the direction. The other half of the ’74 divides the frequency by two to make the encoder less sensitive and make the direction signal not coincident with the pulse signal. When all is said and done, each encoder will result in a Pulse and a Direction signal, which will be used by binary UP/DOWN counters to generate the cursor positions and page addresses.
Each rotary encoder consists of two switch contacts with a common wiper for quadrature channels A and B, as well as a third contact that closes momentarily when the knob is pressed. When the knob is rotated, pulses are generated on the A and B channels at an equivalent frequency proportional to the speed of rotation, but displaced in phase by 90 electrical degrees. The direction of rotation can be determined by which channel leads the other.
First, the quadrature channels of each encoder are de-bounced with a Motorola MC14490 6-channel debouncer chip. Then, for each encoder, one section of a 74HC74 D-Flip-flop decodes the direction. The other half of the ’74 divides the frequency by two to make the encoder less sensitive and make the direction signal not coincident with the pulse signal. When all is said and done, each encoder will result in a Pulse and a Direction signal, which will be used by binary UP/DOWN counters to generate the cursor positions and page addresses.
4. Cursor Generation:
The cursor appears as a blinking dot in the currently selected color. Two 4-bit binary up/down counters are used for the X and Y motions. The X counter drives a 1-of-8 selector that places the cursor in a horizontal line. The Y counter binary value is compared to the current line address, and when they are coincident, the cursor is allowed to be displayed. A simple 2Hz oscillator creates the blink effect, which must be temporarily muted when data is being written to the memory.
5. Cursor and Line Data Integration:
The cursor and screen line data must be combined in such a way as to allow dots to be written or erased, and the cursor to always blink, regardless of the state of the current pixel at the cursor location. Two 74LS181 4-Bit Arithmetic Logic Units (ALUs) are used to generate the necessary bitwise logic operations between the current line segment and the cursor data as follows:
Show Cursor (F = A XOR B) 0110
Store Hole (F = A AND /B) 0111
Store Dot (F = A OR B) 1110
Hide Cursor (F = A) 1111
Erase Page (F = 0) 0011
“A” represents line segment data, “B” represents the Cursor data, and “F” represents the result, which is displayed on the screen, and/or well as written to memory.
The cursor appears as a blinking dot in the currently selected color. Two 4-bit binary up/down counters are used for the X and Y motions. The X counter drives a 1-of-8 selector that places the cursor in a horizontal line. The Y counter binary value is compared to the current line address, and when they are coincident, the cursor is allowed to be displayed. A simple 2Hz oscillator creates the blink effect, which must be temporarily muted when data is being written to the memory.
5. Cursor and Line Data Integration:
The cursor and screen line data must be combined in such a way as to allow dots to be written or erased, and the cursor to always blink, regardless of the state of the current pixel at the cursor location. Two 74LS181 4-Bit Arithmetic Logic Units (ALUs) are used to generate the necessary bitwise logic operations between the current line segment and the cursor data as follows:
Show Cursor (F = A XOR B) 0110
Store Hole (F = A AND /B) 0111
Store Dot (F = A OR B) 1110
Hide Cursor (F = A) 1111
Erase Page (F = 0) 0011
“A” represents line segment data, “B” represents the Cursor data, and “F” represents the result, which is displayed on the screen, and/or well as written to memory.
6. Timing:
Line segment and line addresses are continuously generated by a master counter chain, with, each address, A0 – A5 representing individual line segments. A master oscillator drives a chain of three flip-flops, each of which divides the signal by 2. The divider chain output hen drives a pair of 4-bit binary counters. With the addition of a handful of gates, the full compliment of timing signals, in addition to segment addresses, are generated.
Line segment and line addresses are continuously generated by a master counter chain, with, each address, A0 – A5 representing individual line segments. A master oscillator drives a chain of three flip-flops, each of which divides the signal by 2. The divider chain output hen drives a pair of 4-bit binary counters. With the addition of a handful of gates, the full compliment of timing signals, in addition to segment addresses, are generated.
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| Display and Control Board, Wiring Side View |
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| Logic Board, Chip Side |
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| Logic Board, Wiring Side |
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| Logic Board Schematic |
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| Schematic Diagram, Display and Control Panel |
This project is from an original idea by the author, and was designed and created from whole cloth especially for this contest.
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